NVIDIA

NVIDIA develops processors, software and networking for accelerated computing, including AI training and inference. Its work extends from CUDA, which lets programmers run parallel computations on GPUs, to Dynamo, which coordinates inference across clusters. Its 2026 Vera Rubin platform combines CPUs, GPUs, interconnects and networking in a rack-scale system. Co-founder Jensen Huang has served as president, CEO and a board member since the company’s inception in 1993.[5][10][4][2]

For the quarter ended July 26, 2026, NVIDIA reported $96.221 billion in revenue, including $89.0 billion from Data Center. In its August 26 financial release, it reported Vera Rubin ramping into full production, with racks running at CoreWeave, Google Cloud, Microsoft Azure, Oracle Cloud Infrastructure and Nebius.[3]

This data-center business developed from an earlier focus on graphics. NVIDIA’s founding and its subsequent opening of GPU parallel processing to science and research provide context for its later AI systems.[1][7][4]

Jensen Huang, Chris Malachowsky and Curtis Priem founded NVIDIA on April 5, 1993, initially focusing on 3D graphics for gaming and multimedia. NVIDIA unveiled CUDA architecture in 2006, opening GPU parallel processing to scientific and research applications and expanding what programmers could use its graphics processors to compute.[1]

CUDA defines a programming contract between the CPU and GPU. An application begins on the CPU, whose host code can transfer data, launch a GPU kernel—a function executed by many parallel threads—and coordinate completion. CPU and GPU execution can overlap. Threads use their position within the kernel’s execution grid to determine which data or operations they handle.[5]

CUDA organizes threads into blocks and grids, with groups of 32 threads called warps. Threads within a block can exchange data through on-chip shared memory and synchronize efficiently; different blocks generally must be able to execute in any order. The programming model makes work partitioning and data movement central to GPU programming: efficient execution depends on how software uses the available computation and memory.[5]

Alex Krizhevsky, Ilya Sutskever and Geoffrey Hinton’s AlexNet paper offers a concrete example of GPU hardware shaping AI research. A single NVIDIA GTX 580 had only 3GB of memory, too little for the network they wanted to train. They spread the network across two GPUs, placing roughly half its kernels on each and allowing communication only in selected layers to control its cost. The authors reported training took five to six days. NVIDIA supplied the hardware platform; the researchers designed the network and experiment.[6]

Their ILSVRC-2012 entry combined predictions from several networks and achieved a reported 15.3% top-five test error, compared with 26.2% for the second-best entry. Top-five error measures how often the correct image label is absent from the five most probable predictions. The system combined GPU computation with optimized convolution, network depth and methods to reduce overfitting.[6]

NVIDIA completed its Mellanox acquisition on April 27, 2020, at a transaction value of $7 billion. Initially announced on March 11, 2019, the deal brought Mellanox’s high-performance networking together with NVIDIA’s computing technology. Huang described the resulting scope as “end-to-end technologies from AI computing to networking.” NVIDIA’s stated rationale was to improve performance and resource utilization while lowering operating costs across data-center systems.[7]

NVIDIA’s libraries also support research authored outside the company. Tri Dao’s FlashAttention-2 paper, dated July 18, 2023, credits NVIDIA’s CUTLASS 3.x library for implementation building blocks. FlashAttention computes attention in tiles held in faster on-chip memory, avoiding writes of large intermediate attention matrices to high-bandwidth memory. An online softmax calculation rescales partial results to obtain the full attention result without approximation.[8]

FlashAttention-2 reduces non-matrix-multiplication work, distributes attention computation across more thread blocks and changes how warps divide the work to reduce shared-memory communication. Dao names CUTLASS contributors Vijay Thakkar, Cris Cecka, Haicheng Wu and Andrew Kerr in the acknowledgments. The paper also credits Phil Tillet with first suggesting and implementing the loop-order change and sequence-length parallelization in Triton. NVIDIA supplied library building blocks; Dao authored FlashAttention-2.[8]

In his July 2023 Latent Space interview, Dao recalled beginning a refactor as “an excuse for myself to play with the new library,” CUTLASS 3. Exploring it exposed remaining inefficiencies in FlashAttention and grew into several months of improvements. He described the CUTLASS team as supportive.[9]

NVIDIA also collaborates on models that run on its infrastructure. On July 18, 2024, Mistral released Mistral NeMo, a 12-billion-parameter model built with NVIDIA, with an advertised context window of up to 128,000 tokens. Mistral released both base and instruction-tuned checkpoints under Apache 2.0. The model was also packaged as an NVIDIA NIM inference microservice.[13]

Lower precision connects hardware capabilities with numerical choices in software. NVIDIA’s Transformer Engine supports reduced-precision formats such as FP8, combining them with scaling factors and training recipes. In its H100 linear-layer example, inputs and weights are quantized for eight-bit floating-point matrix multiplication, while weights are stored and outputs returned in higher precision.[12]

Precision is selective. The documented default runs linear operations in lower precision while keeping attention, normalization and softmax in higher precision; some recipes optionally permit lower-precision attention. Maintaining full-precision master weights prevents small gradient updates from disappearing through rounding. These choices retain numerical information where needed while using lower-precision computation for suitable operations.[12]

NVIDIA published its Dynamo open-source library announcement on March 18, 2025. On March 16, 2026, it characterized Dynamo 1.0 as a production-grade, open-source foundation for inference at scale.[17][18]

Dynamo is an orchestration layer above inference engines including SGLang, TensorRT-LLM and vLLM, coordinating them across GPUs and nodes. Built in Rust and Python, it combines routing, caching and automatic scaling. Its disaggregated serving separates prefill and decode into independently scalable GPU pools, allowing the two phases to use hardware suited to their workloads. Feature support varies by backend.[10]ⁿ¹

Dynamo routes requests using worker load and overlap with existing key-value cache data to avoid redundant prefill computation. Its cache manager can offload data across GPU memory, CPU memory, SSDs and remote storage. This coordination targets multi-GPU or multi-node serving; the project advises that an inference engine alone is probably sufficient for a single model on a single GPU.[10]ⁿ¹

The Rubin platform, announced on January 5, 2026, brings computation and communication into a design spanning six chips: the Vera CPU, Rubin GPU, NVLink 6 Switch, ConnectX-9 SuperNIC, BlueField-4 data-processing unit and Spectrum-6 Ethernet switch. The Vera Rubin NVL72 rack combines 72 GPUs and 36 CPUs with interconnect and infrastructure components. NVIDIA also announced HGX Rubin NVL8, linking eight Rubin GPUs for x86-based systems.[4]

Rubin’s scope includes inference storage. Its BlueField-4-based Inference Context Memory Storage Platform is designed to share and reuse key-value cache data across AI infrastructure. The design addresses the larger volumes of context associated with multi-turn reasoning, connecting model execution with storage and networking.[4]

Infrastructure financing also became part of NVIDIA’s expansion. In its August 26, 2026 financial release, NVIDIA announced partnerships with Apollo, BlackRock, Blackstone, Brookfield, Goldman Sachs and KKR to establish independent compute-financing platforms intended to mobilize more than $500 billion of third-party capital over time. The plans were subject to definitive agreements; the figure was a proposed infrastructure-financing target, rather than capital already raised by NVIDIA.[3]